行为
Task #1736
打开Task #1610: FLD System Architecture Design
Task #1612: FLD_SWEA: Software Achitechture Design
Task #1710: FLD_SWEA: Software Achitechture Design - Software Components
Task #1720: FLD_SWEA: Software Achitechture Design - Software Middle Layer Components
FLD_SWEA: Software Achitechture Design - Enviroment Signal Processing
开始日期:
2023-12-07
计划完成日期:
2023-12-09 (大约 19 个月 延期)
% 完成:
0%
预期时间:
描述
1. Left Right Detection
2. board Temperature conversion
3. Vechile voltage conversion
4. LB/TURN triggle signal
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行为